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PAC Publications
Presentations |
Papers
Presentations
SPIE AeroSense Conference
Patrick Shriver, presenter
April 2003
Presentation (PPT)
LA-UR-03-2615
International Signal Processing Conference
Scott Briles, presenter
April 2003
Presentation (PPT)
LA-UR-03-2129
Government Microcircuit Applications and Critical Technology
Conference
Patrick Shriver, presenter
April 2003
Presentation (PPT)
LA-UR-03-2048
DARPA PAC/C PI Meeting
Scott Briles and Patrick Shriver, presenters
June 2002
Presentation (PPT)
LA-UR-02-3541
Poster (PPT)
LA-UR-02-3540
DARPA PAC/C PI Meeting, Space Applications IAT Group
Patrick Shriver, presenter
November 2001
Presentation (PPT)
LA-UR-01-5397
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Papers
"Opening the Door to Smart Power Management in Small Satellites"
Patrick Shriver
Published in Proceedings of the AIAA/USU Conference on Small Satellites, August 2003.
Paper (PDF)
LA-UR-03-3786
"An Intelligent, Onboard Signal Processing Payload Concept"
Patrick Shriver, Jayashree Harikumar, Scott Briles, Maya Gokhale
Published in Proceedings of the SPIE AeroSense Conference,
April 2003.
Paper (PDF)
LA-UR-03-2892
"Power-Aware Improvement in Signal Detection"
Scott D. Briles, Patrick Shriver, Maya Gokhale, Jayashree Harikumar
Published in Proceedings of the International Signal Processing
Conference (ISPC), April 2003.
Paper (PDF)
LA-UR-03-0420
"A Power-Aware Approach to Processing Payload Design"
Patrick
Shriver, Scott Briles, Jayashree Harikumar, Maya Gokhale
Published in Proceedings of the Government Microcircuit
Applications and Critical Technology Conference (GOMACTech),
April 2003.
Paper (PDF)
LA-UR-02-7779
"A Power-Aware, Satellite-Based Parallel Signal Processing Scheme"
Patrick M. Shriver, Maya B. Gokhale, Scott D. Briles, Dong-In
Kang, Michael Cai, Kevin McCabe, Stephen P. Crago, Jinwoo Suh
Published in Power Aware Computing, Robert Graybill and Rami
Melhem eds., Kluwer Academic Press 2002.
Paper
(PDF)
LA-UR-01-5397
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Streams-C Publications
Comparison of
High-Level FPGA Design Tools for a BPSK Signal Detection Application
Gamma-Ray
Pulsar Detection using Reconfigurable Computing Hardware
Evaluation of the Streams-C C-to-FPGA
Compiler: An Applications Perspective
Stream-Oriented FPGA Computing in the
Streams-C High Level Language
Automatic Allocation of Arrays to Memories
in FPGA Processors With Multiple Memory Banks
NAPA C: Compiling for a Hybrid RISC/FPGA
Architecture
Compiling for Fine-grained FPGA
Architectures
The Malleable Architecture
Generator
An overview of the dbC language and
its platforms
Description of the dbC Napa compiler
Description of the dbC Splash
compiler
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